Modern digital very-large-scale integration (VLSI) circuits commonly operate at supply voltages of around 2.5 volts or below. However, certain integrated circuits (ICs) call for additional on-chip circuits operating at higher voltages. Examples of such high-voltage circuits include input/output (IO) interface circuits with various off-chip system components such as power management switches, analog input circuits conditioning transducer signals, or output analog drive functions for speakers or other actuators.
In order to accommodate different voltage levels, some integrated circuits make use of multiple different gate oxide thicknesses to build both low voltage transistors and high voltage transistors on the same IC chip. However, this method increases process complexity and cost. An alternative solution is to use lateral asymmetric source and drain MOS transistors having a lightly doped n-type gap between the drain and gate (for n-type devices) to enable use of higher drain to source voltages, such as laterally diffused Metal-Oxide-Semiconductor (LDMOS) or drain-extended MOS (DeMOS) which have drain structures capable of operating at higher voltages as compared to conventional symmetric MOS transistors.
In an LDMOS transistor, a lightly doped lateral diffused drain region is constructed between the heavily doped drain contact and the transistor channel region. As the name implies, a lateral current is created between drain and source. A depletion region forms in this lightly doped lateral diffused region resulting in a voltage drop between the drain contact and the transistor gate. With proper design, sufficient voltage may be dropped between the drain contact and the gate dielectric to allow a low gate voltage transistor to be used as a switch for the high voltage.
Some lateral power transistors include “RESURF” regions, which is short for reduced surface electric field regions. For purposes of this patent application, the term “RESURF” is understood to refer to a material which reduces an electric field in an adjacent surface semiconductor region. A RESURF region may be for example a buried semiconductor region (or layer) with an opposite conductivity type from the adjacent semiconductor region (or layer). RESURF structures are described in Appels, et. al., “Thin Layer High Voltage Devices” Philips J, Res. 35 1-13, 1980. The RESURF region(s) for lateral power transistors are generally referred to as buried drift regions.
It is desirable for a power transistor such as an LDMOS to be as close to a perfect switch as possible, i.e., as close to zero resistance in the ON state and an open circuit in the OFF state as possible. Because minimizing die area is crucial to minimizing costs, a key metric for an LDMOS transistor is its specific on-resistance Rsp. The specific on-resistance Rsp is defined as the drain-to-source resistance of the transistor in a given amount of area when the transistor is on. Thus Rsp can be expressed as Rsp=Rds(ON)·Area, where Rds(ON) is the drain-to-source on-resistance (the resistance of the LDMOS device in its triode region), and Area is the size of the device. For a switch having a given on-resistance, lower Rsp LDMOS can consume less silicon area.